Update: 6th Mar 2018
Copyright © 2003-2013
Decision Procedures and Verification - Seminar
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This page is devoted to the seminar.
| Date | Topic | Tasks |
| 8.10.2014 | Tseitin encoding, NNF properties, modeling | [PDF] |
| 15.10.2014 | Problem modeling, encoding of states, simulation of CDCL | [PDF] |
| 22.10.2014 | BDDs, MTBDDs, GSAT, WalkSAT, factor graphs | [PDF] |
| 29.10.2014 | Equality logic, Ackermann's reduction, circuit equivalence | [PDF] |
| 5.11.2014 | Equality graphs, adequate domains | [PDF] |
| 26.11.2014 | Small adequate domains | [PDF] |
| 3.12.2014 | Bit vectors and bit vector constraints | [PDF] |
| 10.12.2014 | Arrays and pointers | [PDF] |
| 17.12.2014 | Deciding in combined theories | [PDF] |
| 7.1.2015 | Satisfiability Modulo Theories (SMT) Problem | [PDF] |
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Copyright © 2003-2014 |
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